MAX1400CAI+【PDF 2/34 页】IC ADC 18BIT LP 28-SSOP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录2008

1页 [2页]3页 4页 5页 6页

MAX1400

+5V, 18-Bit, Low-Power, Multichannel,

Oversampling (Sigma-Delta) ADC

______________________________________________________________________________________

Pin Description (continued)

NAME

FUNCTION

PIN

CALGAIN-

Negative Gain Calibration Input. Used for system-gain calibration. It forms the negative input of a fully

differential input pair with CALGAIN+. Normally these inputs are connected to reference voltages in the

system. When system gain calibration is not required and the auto-sequence mode is used, the

CALGAIN+/CALGAIN- input pair provides an additional fully differential input channel.

CALGAIN+

Positive Gain Calibration Input. Used for system gain calibration. It forms the positive input of a fully differ-

ential input pair with CALGAIN-. Normally these inputs are connected to reference voltages in the system.

When system gain calibration is not required and the auto-sequence mode is used, the CALGAIN+/

CALGAIN- input pair provides an additional fully differential input channel.

REFIN-

Negative Differential Reference Input. Bias REFIN- between V+ and AGND, provided that REFIN+ is more

positive than REFIN-.

REFIN+

Positive Differential Reference Input. Bias REFIN+ between V+ and AGND, provided that REFIN+ is more

positive than REFIN-.

CALOFF-

Negative Offset Calibration Input. Used for system offset calibration. It forms the negative input of a fully

differential input pair with CALOFF+. Normally these inputs are connected to zero-reference voltages in

the system. When system offset calibration is not required and the auto-sequence mode is used, the

CALOFF+/CALOFF- input pair provides an additional fully differential input channel.

CALOFF+

Positive Offset Calibration Input. Used for system offset calibration. It forms the positive input of a fully

differential input pair with CALOFF-. Normally these inputs are connected to zero-reference voltages in the

system. When system offset calibration is not required and the auto-sequence mode is used, the

CALOFF+/CALOFF- input pair provides an additional fully differential input channel.

DGND

Digital Ground. Reference point for digital circuitry.

VDD

Digital Supply Voltage (+2.7V to +5.25V)

INT

Interrupt Output. A logic low indicates that a new output word is available from the data register. INT

returns high upon completion of a full output word read operation. INT also returns high for short periods

(determined by the filter and clock control bits) if no data read has taken place. A logic high indicates

internal activity, and a read operation should not be attempted under this condition. INT can also provide

a strobe to indicate valid data at DOUT (MDOUT = 1).

DOUT

Serial Data Output. DOUT outputs data from the internal shift register containing information from the

Communications Register, Global Setup Registers, Transfer Function Registers, or Data Register. DOUT

can also provide the digital bit stream directly from the

Σ- modulator (MDOUT = 1).

DIN

Serial Data Input. Data on DIN is written to the input shift register and later transferred to the

Communications Register, Global Setup Registers, Special Function Register, or Transfer Function

Registers, depending on the register selection bits in the Communications Register.

SCLK

Serial Clock Input. Apply an external serial clock to transfer data to and from the MAX1400. This serial

clock can be continuous, with data transmitted in a train of pulses, or intermittent. If CS is used to frame

the data transfer, then SCLK can idle high or low between conversions and CS determines the desired

active clock edge (see the Selecting Clock Polarity section). If CS is tied permanently low, SCLK must idle

high between data transfers.

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式